Overview

The requirement, to be able to perform remote repair, maintenance or updates is essential. To fulfill this requirement, over the past ten years, CES has developed all of the required technology and logistics. For example:

• CERN accelerator control elements at 100 m below the surface
• Aircraft airborne mission computers
• 3G network elements distributed world-wide

Going one step further, CES has developed a complete environment, all of the way from the hardware building blocks up to the user API, in order to remotely reconfigure systems without stopping their operation.

Basic Requirements

Since 1993 all CES boards are supported by a full traceability package. Each board displays locally and remotely, through network access, the entire version history for hardware PCBs, CPUs, FPGAs, BITE monitors, BSPs and operating system revisions. This information is maintained in a CES database. All boards can be programmed through a CES reprogrammation package, the Reload Box, to put back in operation the current version or an newer updated version. This process is performed directly at the customer site once the test reconfiguration package has been installed and explained by CES engineers.

The latest version of CES computing elements goes even one step further and allows dynamic reconfiguration, which can be performed without stopping the operation. It also supports static reconfiguration possibilities for the older elements.

At the lowest level of the toolkit is the onboard low-level monitor, which is used to reload all of the programmable elements of the board (FPGAs and IPLSI).

Monitoring and Modification Devices

CES has a technological head-start for secure aircraft transmission and mission configuration. The latest version of CES computing elements embarks totally new electronic monitoring devices, which allows regular inspection of the most important parameters of the complete system (processor load, available bandwidth on the external  buses, current used , temperature, etc.). Not only can these elements be monitored during the mission, but in the case of unexpected values, a partial shut-down (CPU by CPU) can be programmed or a mission reconfiguration process (for example: CPU and FPGA reload in another computing element) can be initiated. Multiple CPU and FPGA code versions are also locally stored to allow a dynamic reload of any of these versions. These strategies can be programmed through secure networks (for example: with IPv6 support). These elements are located at a very critical level of the computing core.